HCS12 ARCHITECTURE PDF

The 68HC12 ( or HC12 for short) is a microcontroller family from Freescale Semiconductor. Originally introduced in the mids, the architecture is an. Has several new addressing modes added. • Accesses additional memories externally. Here is an overview of the HCS12 CPU architecture. The HCS12 CPU is. COM/SEMICONDUCTORS. HCS Microcontrollers. S12CPUV2/D. Rev. 0 In the M68HC12 and HCS12 architecture, all memory and input/output. (I/O) are.

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Homework 2 and Lab 2 due next week. The list of these registers is often called hcd12 CPU programming model. PC and Arvhitecture are special-purpose registers that always perform specific functions: PC always holds the address of the next instruction to be executed. CCR always holds three mask bits and five status flags.

The other registers X, Y, and SP sometimes serve as general-purpose registers and sometimes perform specific functions. These two can also be regarded as forming a single bit accumulator named D. Some instructions operate on Architecturr A or Accumulator B. Other instructions operate on Accumulator D.

LDAA loads an 8-bit number into A. LDAB loads an 8-bit number into B. LDD loads a bit number into D. ABA This table uses many abbreviations and special symbols. ABA is very simple. Other instructions are more complicated and have additional things you need to type, explained here: Operation This column explains the operation that the instruction performs.

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HCS12 ARCHITECTURE Razvan Bogdan Embedded Systems.

Some symbols used in this column: Addressing Mode This column shows the addressing mode s used by the instruction. Some abbreviations used in this column: Machine Coding Computers use numbers to represent all kinds of information, including the instructions in a program.

This column shows hccs12 numbers in hex that represent each instruction.

Access Detail This column shows how many cycles each instruction takes to execute, and what happens during each of those cycles. Condition Codes These columns show how each instruction affects the bits in the Condition Code Register. Symbols used in these columns: Do practice sheet on instructionSummary. Small instruction set maybe 25 or 30 instructions. Each instruction performs a simple operation and executes quickly.

Some instructions perform complex operations that might require a dozen or more instructions in a RISC processor. Assembly language contains many mnemonics, which are abbreviations for actions that we want to perform. These operands are the data usually numbers to be operated on. In the instruction LDAA 5, the operand is 5. But there are other ways to specify the operand. For example, instead of specifying the number to be loaded right in the instruction itself, maybe we want to load the number from a particular archigecture location into ACCA.

Memory Addresses Every computer system has memory, where programs and data are stored. Each location within this memory has an address by which we identify it. And each location holds arcgitecture contents, which is one byte.

The HCS12 uses a bit address bus. So we have 65, memory locations, each of which holds one byte. Memory Map Programmers must pay attention to where in memory their programs and data are stored. Therefore, within the range of possible addresses, only some can be used by your programs. A memory map shows which memory addresses are reserved, and which are available for your use.

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Next slide shows memory map for our HCS12 chip. The ABA instruction always uses the inherent addressing mode. The LDAA instruction can use immediate, direct, extended, or indexed addressing. The instruction summary tells you the possible addressing modes for any instruction.

The pound sign indicates immediate addressing. The following are all equivalent: But this address is two bytes long, so we can reach any memory location. Do addressingModes practice sheet.

But only some instructions affect these flag bits: Do conditionCode practice sheet for H, Z, C bits. In this notation, the leftmost hcs1 is the sign bit.

Examples, using 8 bits: This happens when either: Again, only some instructions affect these flag bits: Do conditionCode practice sheet for N, V bits. Homework 7 and Lab 7 due next week.

HCS12 Microcontrollers and Embedded Systems : Muhammad Ali Mazidi :

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